IC2251 DIGITAL PRINCIPLES AND DESIGN SYLLABUS | ANNA UNIVERSITY BE I&C INSTRUMENTATION AND CONTROL ENGINEERING 4TH SEM SYLLABUS REGULATION 2008 2011 2012-2013 BELOW IS THE ANNA UNIVERSITY FOURTH SEMESTER BE INSTRUMENTATION AND CONTROL ENGINEERING DEPARTMENT SYLLABUS, TEXTBOOKS, REFERENCE BOOKS,EXAM PORTIONS,QUESTION BANK,PREVIOUS YEAR QUESTION PAPERS,MODEL QUESTION PAPERS, CLASS NOTES, IMPORTANT 2 MARKS, 8 MARKS, 16 MARKS TOPICS. IT IS APPLICABLE FOR ALL STUDENTS ADMITTED IN THE YEAR 2011 2012-2013 (ANNA UNIVERSITY CHENNAI,TRICHY,MADURAI,TIRUNELVELI,COIMBATORE), 2008 REGULATION OF ANNA UNIVERSITY CHENNAI AND STUDENTS ADMITTED IN ANNA UNIVERSITY CHENNAI DURING 2009
IC2251 DIGITAL PRINCIPLES AND DESIGN L T P C
3 0 0 3
AIM
To introduce the fundamentals of Digital Circuits, combinational and sequential circuit,
digital system design and VSI circuits.
OBJECTIVES
i. To review Boolean algebra and to simplify the mathematical expressions
using Boolean functions – simple problems.
ii. To study implementation of combinational circuits
iii. To study the design of various synchronous and asynchronous circuits.
iv. To expose the students to programmable logic devices and digital logic
families.
v. To introduce the concepts of VLSI circuits
UNIT I DESIGN OF COMBINATIONAL CIRCUITS 9
Review of Boolean algebra – codes, simplification using K-maps & Quine McCluskey
method. Design of adder, subtractor, comparators, code converters, encoders, decoders,
multiplexers and demultiplexers. Function realization using gates and multiplexers.
UNITII SYNCHRONOUS AND ASYNCHRONOUS SEQUENTIAL CIRCUITS 9
Flip flops - SR, D, JK and T. Analysis of synchronous sequential circuits; design of
synchronous sequential circuits – Completely and incompletely specified sequential
circuits - state diagram; state reduction; state assignment, Counters – synchronous, a
synchronous, updown and Johnson counters; shift registers.
Analysis of asynchronous sequential machines, state assignment, asynchronous Design
problem.
UNIT III PROGRAMMABLE LOGIC DEVICES 9
Programmable logic Arrays, Programmable array logic, Realizing logic function using
Multiplexers, Decoders, ROM, PLA, PAL. Design of sequential Networks using PAL, PLA
– Programmable Gate arrays – FPGA – CPLD.
36
UNIT IV DIGITAL LOGIC FAMILIES 9
TTL, CMOS, NMOS, Dynamic MOS , ECL, I2L, Operating conditions, Parameters,
Interpreting data sheets. Power supply grounding considerations for digital ICs, TTL – to
– CMOS Interface, CMOS – to – TTL interface.
UNIT V INTRODUCTION TO VLSI 9
Fundamental consideration – NMOS, CMOS, Design of combinational logic gates in
CMOS.
L = 45 TOTAL =45PERIODS
TEXT BOOKS
1. M. Morris Mano, ‘Digital Logic and Computer Design’, Prentice Hall of India, 2002.
2. S.M.Sze, ‘VLSI Technology’, 2nd Edition, Tata McGraw Hill Publising Co. New Delhi,
1996.
3. Charles H.Roth, ‘Fundamentals Logic Design’, Jaico Publishing, IV edition, 2002.
REFERENCES 1.Theodore. F. Bogart,’ Introduction to Digital Circuits’, McGraw – Hill International
edition.
2. John M.Yarbrough, ‘Digital Logic, Application & Design’, Thomson, 2002.
3.John F.Wakerly, ‘Digital Design Principles and Practice’, 3rd edition, Pearson
Education, 2002.
IC2251 DIGITAL PRINCIPLES AND DESIGN L T P C
3 0 0 3
AIM
To introduce the fundamentals of Digital Circuits, combinational and sequential circuit,
digital system design and VSI circuits.
OBJECTIVES
i. To review Boolean algebra and to simplify the mathematical expressions
using Boolean functions – simple problems.
ii. To study implementation of combinational circuits
iii. To study the design of various synchronous and asynchronous circuits.
iv. To expose the students to programmable logic devices and digital logic
families.
v. To introduce the concepts of VLSI circuits
UNIT I DESIGN OF COMBINATIONAL CIRCUITS 9
Review of Boolean algebra – codes, simplification using K-maps & Quine McCluskey
method. Design of adder, subtractor, comparators, code converters, encoders, decoders,
multiplexers and demultiplexers. Function realization using gates and multiplexers.
UNITII SYNCHRONOUS AND ASYNCHRONOUS SEQUENTIAL CIRCUITS 9
Flip flops - SR, D, JK and T. Analysis of synchronous sequential circuits; design of
synchronous sequential circuits – Completely and incompletely specified sequential
circuits - state diagram; state reduction; state assignment, Counters – synchronous, a
synchronous, updown and Johnson counters; shift registers.
Analysis of asynchronous sequential machines, state assignment, asynchronous Design
problem.
UNIT III PROGRAMMABLE LOGIC DEVICES 9
Programmable logic Arrays, Programmable array logic, Realizing logic function using
Multiplexers, Decoders, ROM, PLA, PAL. Design of sequential Networks using PAL, PLA
– Programmable Gate arrays – FPGA – CPLD.
36
UNIT IV DIGITAL LOGIC FAMILIES 9
TTL, CMOS, NMOS, Dynamic MOS , ECL, I2L, Operating conditions, Parameters,
Interpreting data sheets. Power supply grounding considerations for digital ICs, TTL – to
– CMOS Interface, CMOS – to – TTL interface.
UNIT V INTRODUCTION TO VLSI 9
Fundamental consideration – NMOS, CMOS, Design of combinational logic gates in
CMOS.
L = 45 TOTAL =45PERIODS
TEXT BOOKS
1. M. Morris Mano, ‘Digital Logic and Computer Design’, Prentice Hall of India, 2002.
2. S.M.Sze, ‘VLSI Technology’, 2nd Edition, Tata McGraw Hill Publising Co. New Delhi,
1996.
3. Charles H.Roth, ‘Fundamentals Logic Design’, Jaico Publishing, IV edition, 2002.
REFERENCES 1.Theodore. F. Bogart,’ Introduction to Digital Circuits’, McGraw – Hill International
edition.
2. John M.Yarbrough, ‘Digital Logic, Application & Design’, Thomson, 2002.
3.John F.Wakerly, ‘Digital Design Principles and Practice’, 3rd edition, Pearson
Education, 2002.
No comments:
Post a Comment
Any doubt ??? Just throw it Here...