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Saturday, October 27, 2012

CS9211 COMPUTER ARCHITECTURE SYLLABUS | ANNA UNIVERSITY MTECH IT 1ST SEM SYLLABUS REGULATION 2009 2011 2012-2013

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CS9211 COMPUTER ARCHITECTURE SYLLABUS | ANNA UNIVERSITY MTECH IT 1ST SEM SYLLABUS REGULATION 2009 2011 2012-2013 BELOW IS THE ANNA UNIVERSITY FIRST SEMESTER M.TECH. INFORMATION TECHNOLOGY DEPARTMENT SYLLABUS, TEXTBOOKS, REFERENCE BOOKS,EXAM PORTIONS,QUESTION BANK,PREVIOUS YEAR QUESTION PAPERS,MODEL QUESTION PAPERS, CLASS NOTES, IMPORTANT 2 MARKS, 8 MARKS, 16 MARKS TOPICS. IT IS APPLICABLE FOR ALL STUDENTS ADMITTED IN THE YEAR 2011 2012-2013 (ANNA UNIVERSITY CHENNAI,TRICHY,MADURAI, TIRUNELVELI,COIMBATORE), 2009 REGULATION OF ANNA UNIVERSITY CHENNAI AND STUDENTS ADMITTED IN ANNA UNIVERSITY CHENNAI DURING 2009
CS9211 COMPUTER ARCHITECTURE L T P C
3 0 0 3
UNIT I FUNDAMENTALS OF COMPUTER DESIGN AND PIPELINING 9
Fundamentals of Computer Design – Measuring and reporting performance –
Quantitative principles of computer design. Instruction set principles – Classifying ISA –
Design issues. Pipelining – Basic concepts – Hazards – Implementation – Multicycle
operations.
UNIT II INSTRUCTION LEVEL PARALLELISM WITH
DYNAMIC APPROACHES 9
Concepts – Dynamic Scheduling – Dynamic hardware prediction – Multiple issue –
Hardware based speculation – Limitations of ILP – Case studies.
4
UNIT III INSTRUCTION LEVEL PARALLELISM WITH SOFTWARE
APPROACHES 9
Compiler techniques for exposing ILP – Static branch prediction – VLIW – Advanced
compiler support – Hardware support for exposing more parallelism – Hardware versus
software speculation mechanisms – Case studies.
UNIT IV MULTIPROCESSORS AND MULTICORE ARCHITECTURES 9
Symmetric and distributed shared memory architectures – Performance issues –
Synchronisation issues – Models of memory consistency – Software and hardware
multithreading – SMT and CMP architectures – Design issues – Case studies.
UNIT V MEMORY AND I/O 9
Cache performance – Reducing cache miss penalty and miss rate – Reducing hit time –
Main memory and performance – Memory technology. Types of storage devices –
Buses – RAID – Reliability, availability and dependability – I/O performance measures –
Designing an I/O system.
TOTAL:45 PERIODS
REFERENCES:
1. John L. Hennessey and David A. Patterson, “ Computer Architecture – A quantitative
approach”, Morgan Kaufmann / Elsevier, 4th. edition, 2007.
2. David E. Culler, Jaswinder Pal Singh, “Parallel Computing Architecture : A hardware/
software approach” , Morgan Kaufmann / Elsevier, 1997.
3. William Stallings, “ Computer Organization and Architecture – Designing for
Performance”, Pearson Education, Seventh Edition, 2006.
4. Behrooz Parhami, “Computer Architecture”, Oxford University Press, 2006.

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