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EI2403 VLSI DESIGN SYLLABUS | ANNA UNIVERSITY BE E&I 7TH SEM SYLLABUS REGULATION 2008 2011 2012-2013

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EI2403 VLSI DESIGN SYLLABUS | ANNA UNIVERSITY BE E&I 7TH SEM SYLLABUS REGULATION 2008 2011 2012-2013 BELOW IS THE ANNA UNIVERSITY SEVENTH SEMESTER BE ELECTRONICS AND INSTRUMENTATION ENGINEERING DEPARTMENT SYLLABUS, TEXTBOOKS, REFERENCE BOOKS,EXAM PORTIONS,QUESTION BANK,CLASS NOTES, IMPORTANT 2 MARKS, 8 MARKS, 16 MARKS TOPICS. IT IS APPLICABLE FOR ALL STUDENTS ADMITTED IN THE YEAR 2011 2012-2013 (ANNA UNIVERSITY CHENNAI,TRICHY,MADURAI,TIRUNELVELI,COIMBATORE), 2008 REGULATION OF ANNA UNIVERSITY CHENNAI AND STUDENTS ADMITTED IN ANNA UNIVERSITY CHENNAI DURING 2009


EI2403 VLSI DESIGN L T P C
3 0 0 3
AIM
To introduce the technology and concepts of VLSI.
OBJECTIVES
To introduce MOS theory / Manufacturing Technology.
To study inverter / counter logic / stick / machine diagram / sequential circuits.
To study address / memory / arithmetic circuits.
To introduce FPGA architecture / principles / system design.
To get familiarised with VHDL programming behavioural/Structural/concurrent/ process.
UNIT I BASIC MOS TRANSISTOR 9
Enhancement mode and Depletion mode – Fabrication (NMOS, PMOS, CMOS, BiCMOS)
Technology – NMOS transistor current equation – Second order effects – MOS Transistor Model.
UNIT II NMOS AND CMOS INVERTER AND GATES 9
NMOS and CMOS inverter – Determination of pull up / pull down ratios – Stick diagram – lambda
based rules – Super buffers – BiCMOS & steering logic.
UNIT III SUB-SYSTEM DESIGN AND LAYOUT 9
Structured design of combinational circuits – Dynamic CMOS & clocking – Tally circuits – (NANDNAND,
NOR-NOR and AOI logic) – EXOR structure – Multiplexer structures – Barrel shifter, high
speed adder and multiplier circuits.
UNIT IV DESIGN OF COMBINATIONAL ELEMENTS AND REGULAR ARRAY LOGIC 9
NMOS PLA – Programmable Logic Devices - Finite State Machine PLA – Introduction to FPGA.
UNIT V VHDL PROGRAMMING 9
RTL Design – simulation and synthesis - Combinational logic – Types – Operators – Packages –
Sequential circuit – Sub-programs – Test benches. (Examples: adders, counters, flipflops, FSM,
Multiplexers / Demultiplexers).
TOTAL : 45 PERIODS
TEXT BOOKS:
1. D.A.Pucknell, K.Eshraghian, ‘Basic VLSI Design’, 3rd Edition, Prentice Hall of India,
New Delhi, 2003.
2. Rabey, J.M., Digital Integrated Circuits: A Design Perspective, Prentice Hall, 1955
3. Bhasker, J., VHDL Primer, Prentice Hall 1995
REFERENCES:
1. Eugene D.Fabricius, ‘Introduction to VLSI Design’, Tata McGraw Hill, 1990.
2. N.H.Weste, ‘Principles of CMOS VLSI Design’, Pearson Eduction, India, 2002.
3. Zainalatsedin Navabi, ‘VHDL Analysis and Modelling of Digital Systems’, 2nd Edition, Tata
McGraw Hill, 1998.
4. Douglas Perry, ‘VHDL Programming by example’, Tata McGraw Hill, 3rd Edition,
2003

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